RISC Machine
The Challenge
To build a computer that implements a "Reduced Instruction Set Computer", otherwise known as a RISC. Using simple computer elements such as a Datapath, ALU, State Machine, and Data-mapped I/O, have the RISC machine be capable of executing basic logical operations such as addition, subtraction AND, OR, etc.
Architecture
This simple RISC machine architecture is comprised of many components. Namely, it includes a register file to execute tasks, ALU to perform arithmetic and logical operations, multiplexers to drive decision, and a shifter unit to shift encoded bits.
Process of Design
Each component was individually created as a module and was verified with test benches to ensure proper functioning. Then, every module was brought together with the datapath.
A set of example instructions were given to test the functioning of each component which was executed through test benches that we programmed.
What I learned
While the machine was simpler than computers in reality, I was able to have a strong grasp on how computers really work. I learned about how the architecture is modeled and how each component is integrated to complete the functioning of the machine. Moreover, I was able to develop my programming skills in Verilog and learn how to verify through Modelsim and Quartus.